Mrs. Jusmita Das

PhD, Electronics & Instrumentation Engineering, National Institute of Technology Silchar, 2025.

2018. Tech, Electronics & Instrumentation Engineering, National Institute ofTechnology Silchar, 2018.
2019. Tech, Electronics & Instrumentation Engineering, National Institute of Technology Agartala, 2015.

• JSPM University, October 2025 to Present

• Equivalent circuit models
• Battery technology
• Energy storage systems
• Battery modeling & testing
• Electrode fabrication and characterisation
• Material Science

• Jusmita Das et al. “Design and Validation of a Nonlinear Electrical Equivalent Circuit Model of Vanadium Redox Flow Battery Considering Variable Flow Rate." Journal of Energy Storage (2025). Elsevier DOI: https://doi.org/10.1016/j.est.2025.116006 (Q1). (I.F 9.8)
• Jusmita Das et al. “Electrical Equivalent Circuit Model and RC Parameter Estimation for Vanadium Redox Flow Battery by Considering Self-discharge." Arabian Journal for Science and Engineering (2024): 1-12. Springer Nature. DOI: https://doi.org/10.1007/s13369-024-08828-7 (Q1). (I.F 2.6)
• Jusmita Das and Rajdeep Dasgupta, “A Review and Analysis of Electrical Equivalent Circuit Models of Vanadium Redox Flow Battery” Emerging Electronics and Automation: Select Proceedings of E2A 2021, 183-192. Lecture Notes in Electrical Engineering 937. Springer. DOI: https://doi.org/10.1007/978-981-19-4300-3-15 (Scopus Indexed)
• Jusmita Das and Rajdeep Dasgupta, “Investigation of Flow Induced Variation in Vanadium Redox Flow Battery with Electrochemical Impedance Spectroscopy” Smart Technologies for Power, Energy and Control: 2025 IEEE 4th International Conference. IEEE Xplore. (Scopus Indexed)

• Title
• Funding Agency
• Duration

• IEEE Member

• Digital electronics
• Analog electronics
• Electrical and electronic measurements
• Sensors and transducers
• Industrial automation

• Webmaster, IEEE Instrumentation and Measurement Society, NIT Silchar 2023-2025.

• Selected for a leadership program and received funding by IIT Delhi, India to attend

2nd Transformative Leadership in STEMM (TLS) Workshop for Ph.D. Scholars.

• Doctoral Fellowship of Ministry of Education (MOE), Government of India, as PhD research

scholar at National Institute of Technology Silchar.

• Fellowship of Ministry of Education (MOE), Government of India, as an M. Tech scholar at

National Institute of Technology Silchar.

• Qualified GATE (Graduate Aptitude Test in Engineering) Electronics and Instrumentation

Engineering examination.

• Qualified AIEEE (All India Engineering Entrance Examination.)

    Department: School of Electrical and Communication Sciences, Faculty of Science and Technology

    Email: jhd.secs@jspmuni.ac.in , jusmita.nita2008@gmail.com 

    Phone: 9615759952

    Office Location: JSPM University, Wagholi, Pune - 412207

    LinkedIn: https://www.linkedin.com/in/jusmita-das-410a32168/